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data sheet caution electro-static sensitive device the information in this document is subject to change without notice. before using this document, please confirm that this is the latest version. not all devices/types available in every country. please check with local nec representative for availability and additional information. bipolar analog integrated circuit m m m m pc8110gr 1 ghz direct quadrature modulator for digital mobile communication document no. p11074ej3v0ds00 (3rd edition) date published october 1999 n cp(k) printed in japan data sheet ? 1996, 1999 the mark shows major revised points. description the m pc8110gr is a sillicon monolithic integrated circuit designed as 1 ghz direct quadrature modulator for digital mobile communication systems. this modulator housed in a 20 pin plastic ssop that easy to install and contributes to miniaturizing the system. the device has power save function and can operates 2.7 to 3.6 v supply voltage to realize low power consumption. features ? direct modulation range : 800 mhz to 1 ghz ? supply voltage range : v cc = 2.7 to 3.6 v ? low operation current : i cc = 24 ma typical @ v cc = 3 v ? low phase difference due to digital phase shifter is adopted. ? 20 pin ssop suitable for high density surface mounting. ? low current sleep mode application ? digital cellular phone (pdc, is-54/is-136, gsm etc..) ordering information part number package packing form m pc8110gr-e1 20 pin plastic ssop carrier tape width 12 mm. qty 2.5 kp/reel pin 1 indicated pull-out direction of tape. remark for evaluation sample order, please contact your local nec sales office. (order number: m pc8110gr)
data sheet p11074ej3v0ds00 2 m m m m pc8110gr internal block diagram and pin connections (top view) 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 90? phase sitter reg. 1. 2. 3. 4. 5. 6. 7. 8. 9. 10. 11. 12. 13. 14. 15. 16. 17. 18. 19. 20. lo in gnd lo in gnd q-input q-input i-input i-input gnd gnd rf out gnd gnd v cc gnd gnd power save (v ps ) gnd v cc gnd series products series type part number f lo1 in (mhz) f mod out (mhz) f i/q (mhz) up-converter f rf out (mhz) application 150 mhz quadrature mod m pc8101gr 100 to 300 50 to 150 dc to 0.5 external ct2, digital comm. up-con+quadrature mod m pc8104gr 100 to 400 dc to 10 900 to 1900 phs, pdc etc.. 400 mhz quadrature mod m pc8105gr 100 to 400 dc to 10 external pdc, is -136, gsm, phs 1 ghz direct quad mod m pc8110gr 800 to 1000 dc to 10 direct pdc, is-136, gsm etc. remark as for detail information of series products, please refer to each data sheet.
data sheet p11074ej3v0ds00 3 m m m m pc8110gr application example pdc 900 mhz (direct modulation type) ant rx tx sw pa bpf rssi demo i q rssi out pll 0? 90? f/f i q 900 mhz direct quadrature modulator pc8110gr m absolute maximum ratings parameter symbol rating unit test conditions supply voltage v cc 4.0 v t a = +25 c power save voltage v ps 4.0 v t a = +25 c power dissipation p d 430 mw t a = +85 c note 1 operating temperature t opt - 40 to +85 c storage temperature t stg - 55 to +150 c note 1. mounted on 50 50 1.6 mm double copper clad epoxy glass board recommended operating conditions parameter symbol min. typ. max. unit test conditions supply voltage v cc 2.7 3.0 3.6 v operating temperature t opt - 40 +25 +85 c l o input frequency fl oin 800 900 1000 mhz l o input power level pl oin - 15 - 10 - 7dbm i/q input frequency f i/qin dc 10 mhz i/q input voltage v i/qin 500 mv p-p single ended input 250 differential input
data sheet p11074ej3v0ds00 4 m m m m pc8110gr electrical characteristics (t a = 25 c, v cc = 3.0 v, unless otherwise specified v ps 3 3 3 3 2.2 v (high)) parameter symbol min. typ. max. unit test conditions circuit current i cc 20 24 33 ma no input signal circuit current at power save mode i cc(ps) 10 ua v ps 0.5 v (low) maximum output power p o(sat) - 13 - 10 dbm l o carrier leak lol - 35 - 30 dbc image rejection (side band leak) imr - 40 - 30 dbc i/q 3rd order intermodulation distortion im 3i/q - 45 - 30 dbc power save rise time t ps(rise) 35 m sv ps : low ? high power save fall time t ps(fall) 25 m sv ps : high ? low standard characteristics for reference (t a = +25 c, v cc = 3.0 v, unless otherwise specified v ps 3 3 3 3 2.2 v (hgih)) parameter symbol min. typ. max. unit test conditions i/q input impeadance z i/qin 150 k w f i/q = dc to 10 mhz l o input vswr vswr (lo) 1.5 : 1 - f lo = 948 mhz rf output vswr vswr (rf) 1.5 : 1 - f lo = 948 mhz f loin = 948 mhz p loin = - 10 dbm f i/q = 2.625 khz i/q (dc) = v cc /2 v i/qin = 500 mv p-p (single ended)
data sheet p11074ej3v0ds00 5 m m m m pc8110gr pin explanation pin no. assignment supply vol. (v) pin vol. (v) function and application equivalent ci rcuit 1l oin ? 2.6 l o input for phase shifter. connect around 50 w between 1 and 3 pin to match to 50 w . 2 18 gnd (for local amp. block) 0 ? connect to the ground with minimum inductance. track length should be kept as short as possible. 3l oin ? 2.6 bypass of l o input. this pin is grounded through around 33 pf capacitor. 5q v cc /2 ? input for q signal. this input impedance is 150 k w . in case of that i/q input signals are single ended, amplitude of the signal is 500 mvp-p max. note 2 6q v cc /2 ? input for q signal. this input impedance is 150 k w . in case of that i/q input signals are single ended, v cc /2 biased dc signal should be input. in case of that i/q input signals are differential, amplitude of the signal is 250 mvp-p max. note 2 7i v cc /2 ? input for i signal. this input impedance is 150 k w . in case of that i/q input signals are single ended, v cc /2 biased dc signal should be input. in case of that i/q input signals are differential, amplitude of the signal is 250 mvp-p max. note 2 8i v cc /2 ? input for i signal. this input impedance is 150 k w . in case of that i/q input signals are single ended, amplitude of the signal is 500 mvp-p max. note 2 9 13 16 gnd (for quadrature modulator block) 0 ? connect to the ground with minimum inductance. track length should be kept as short as possible. ? 1 3 5 6 8 7
data sheet p11074ej3v0ds00 6 m m m m pc8110gr pin no. assignment supply vol. (v) pin vol. (v) function and application equivalent ci rcuit 11 rf out ? 1.6 output from modulator. this is single-end push-pull amplifier. so this output impedance is low. 12 gnd (for output push-pull amplifier) 0 ? connect to the ground with minimum inductance. track length should be kept as short as possible. 14 v cc (for output amplifier of modulator) 2.7 to 3.6 ? supply voltage pin for output amplifier of modulator. internal regulator can be kept stable condition of supply bias against the variable temperature or v cc . 17 power save v p/s ? power save control pin can be controlled on/sleep state with bias as follows; 19 v cc 2.7 to 3.6 ? supply voltage pin for modulator except output amplifier. internal regulator can be kept stable condition of supply bias against the variable temperature or v cc . ? 4 10 15 20 gnd 0 ? connect to the ground with minimum inductance. track length should be kept as short as possible. ? note 2. relations between amplitude and v cc /2 bias of input signal are following. p i/qin - i/q input signal - mvp-p single ended input i = q differential input i = i = q = q 2.7 to 3.6 1.35 to 1.8 500 250 11 from modulator 17 v p/s state 2.2 to 3.6 on 0 to 0.5 sleep i/q dc voltage (v) v cc /2 = i = i = q = q supply voltage v cc (v)
data sheet p11074ej3v0ds00 7 m m m m pc8110gr explanation of internal function block function/operation block diagram 90 phase shifter input signal from l o is send to digital circuit of t-type flip-flop through frequency doubler. output signal from t-type f/f is changed to same frequency as l o input and that have quadrature phase shift, 0 , 90 , 180 , 270 . these circuits have function of self phase correction to make correctly quadrature signals. buffer amp. buffer amplifiers for each phase signals to send to each mixers. mixer each signals from buffer amp. are quadrature modulated with two double-balanced mixers. high accurate phase and amplitude inputs are realized to good performance for image rejection. adder output signals from each mixers are added with adder and send to final amplifier. i from lo in 2 2 f/f i q q to mod out
data sheet p11074ej3v0ds00 8 m m m m pc8110gr typical characteristics unless otherwise specified t a = +25 c, v cc = v ps = 3 v, i/q dc/offset = i/q dc offset = 1.5 v, i/q input signal = 500 mv p-p (single ended), f i/q = 2.625 khz, f loin = 948 mhz, p loin = - 10 dbm, transmission speed: 42 kbps, rnyq: a = 0.5. circuit current vs supply voltage i cc - circuit current - ma v cc - supply voltage - v 30 25 20 15 10 5 0 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 t a = +25 ?c t a = ?0 ?c t a = +85 ?c v cc = v ps i/q (dc) = v cc /2 rf none circuit current vs power save voltage i cc - circuit current - ma v ps - power save voltage - v 30 25 20 15 10 5 0 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 t a = +25 ?c t a = ?0 ?c t a = +85 ?c v cc = 3 v i/q (dc) = 1.5 v rf none
data sheet p11074ej3v0ds00 9 m m m m pc8110gr rf output power vs i/q input signal (at t a = ?0 ?c) 0 ? ?0 ?5 ?0 ?5 100 200 300 400 500 p rfout - rf output power - dbm p i/qin - i/q input signal - mvp-p v cc = 3.0 v v cc = 2.7 v v cc = 3.6 v single ended rf output power vs i/q input signal (at t a = +25 ?c) 0 ? ?0 ?5 ?0 ?5 100 200 300 400 500 p rfout - rf output power - dbm p i/qin - i/q input signal - mvp-p v cc = 3.0 v v cc = 2.7 v v cc = 3.6 v single ended rf output power vs i/q input signal (at t a = +85 ?c) 0 ? ?0 ?5 ?0 ?5 100 200 300 400 500 p rfout - rf output power - dbm p i/qin - i/q input signal - mvp-p v cc = 3.0 v v cc = 2.7 v v cc = 3.6 v single ended
data sheet p11074ej3v0ds00 10 m m m m pc8110gr ?0 ?5 ?0 ?5 ?0 ?5 700 800 900 1000 1100 ? ?0 ?5 ?0 ?5 ?0 lo input frequency vs p rfout , lol, imr, im 3i/q (at v cc = 2.7 v, t a = ?0 ?c) lol - local ieak, imr - image rejection, im 3i/q - dbc f lo - local input frequency - mhz p rfout - rf output power - dbm ?0 ?5 ?0 ?5 ?0 ?5 700 800 900 1000 1100 ? ?0 ?5 ?0 ?5 ?0 lo input frequency vs p rfout , lol, imr, im 3i/q (at v cc = 3.0 v, t a = ?0 ?c) lol - local ieak, imr - image rejection, im 3i/q - dbc f lo - local input frequency - mhz p rfout - rf output power - dbm ?0 ?5 ?0 ?5 ?0 ?5 700 800 900 1000 1100 ? ?0 ?5 ?0 ?5 ?0 lo input frequency vs p rfout , lol, imr, im 3i/q (at v cc = 3.6 v, t a = ?0 ?c) lol - local ieak, imr - image rejection, im 3i/q - dbc f lo - local input frequency - mhz p rfout - rf output power - dbm ?0 ?5 ?0 ?5 ?0 ?5 700 800 900 1000 1100 ? ?0 ?5 ?0 ?5 ?0 lo input frequency vs p rfout , lol, imr, im 3i/q (at v cc = 2.7 v, t a = +25 ?c) lol - local ieak, imr - image rejection, im 3i/q - dbc f lo - local input frequency - mhz p rfout - rf output power - dbm ?0 ?5 ?0 ?5 ?0 ?5 700 800 900 1000 1100 ? ?0 ?5 ?0 ?5 ?0 lo input frequency vs p rfout , lol, imr, im 3i/q (at v cc = 3.0 v, t a = +25 ?c) lol - local ieak, imr - image rejection, im 3i/q - dbc f lo - local input frequency - mhz p rfout - rf output power - dbm ?0 ?5 ?0 ?5 ?0 ?5 700 800 900 1000 1100 ? ?0 ?5 ?0 ?5 ?0 lo input frequency vs p rfout , lol, imr, im 3i/q (at v cc = 3.6 v, t a = +25 ?c) lol - local ieak, imr - image rejection, im 3i/q - dbc f lo - local input frequency - mhz p rfout - rf output power - dbm imr imr imr imr imr imr lol lol lol lol lol lol p rfout im 3i/q p rfout im 3i/q p rfout im 3i/q p rfout im 3i/q p rfout im 3i/q p rfout im 3i/q
data sheet p11074ej3v0ds00 11 m m m m pc8110gr ?0 ?5 ?0 ?5 ?0 ?5 700 800 900 1000 1100 ? ?0 ?5 ?0 ?5 ?0 lo input frequency vs p rfout , lol, imr, im 3i/q (at v cc = 2.7 v, t a = +85 ?c) lol - local ieak, imr - image rejection, im 3i/q - dbc f lo - local input frequency - mhz p rfout - rf output power - dbm ?0 ?5 ?0 ?5 ?0 ?5 700 800 900 1000 1100 ? ?0 ?5 ?0 ?5 ?0 lo input frequency vs p rfout , lol, imr, im 3i/q (at v cc = 3.0 v, t a = +85 ?c) lol - local ieak, imr - image rejection, im 3i/q - dbc f lo - local input frequency - mhz p rfout - rf output power - dbm ?0 ?5 ?0 ?5 ?0 ?5 700 800 900 1000 1100 ? ?0 ?5 ?0 ?5 ?0 lo input frequency vs p rfout , lol, imr, im 3i/q (at v cc = 3.6 v, t a = +85 ?c) lol - local ieak, imr - image rejection, im 3i/q - dbc f lo - local input frequency - mhz p rfout - rf output power - dbm ?0 ?5 ?0 ?5 ?0 ?5 ? ?0 ? ?0 ?5 ?0 ?5 ?0 lo input power vs p rfout , lol, imr, im 3i/q (at v cc = 2.7 v, t a = ?0 ?c) lol - local ieak, imr - image rejection, im 3i/q - dbc l o - local input power - dbm p rfout - rf output power - dbm imr imr imr imr lol lol lol lol ?0 ?5 ?0 ?5 ?0 ?5 ? ?0 ?5 ?0 ?5 ?0 lo input power vs p rfout , lol, imr, im 3i/q (at v cc = 3.0 v, t a = ?0 ?c) lol - local ieak, imr - image rejection, im 3i/q - dbc l o - local input power - dbm p rfout - rf output power - dbm imr lol ?0 ?5 ?0 ?5 ?0 ?5 ? ?0 ?5 ?0 ?5 ?0 lo input power vs p rfout , lol, imr, im 3i/q (at v cc = 3.6 v, t a = ?0 ?c) lol - local ieak, imr - image rejection, im 3i/q - dbc l o - local input power - dbm p rfout - rf output power - dbm imr lol ?5 ? ?0 ?5 ? ?0 ?5 p rfout im 3i/q p rfout im 3i/q p rfout im 3i/q p rfout im 3i/q p rfout p rfout im 3i/q im 3i/q
data sheet p11074ej3v0ds00 12 m m m m pc8110gr ?0 ?5 ?0 ?5 ?0 ?5 ? ?0 ? ?0 ?5 ?0 ?5 ?0 lo input power vs p rfout , lol, imr, im 3i/q (at vcc = 2.7 v, t a = +85 ?c) lol - local ieak, imr - image rejection, im 3i/q - dbc l o - local input power - dbm p rfout - rf output power - dbm imr lol ?0 ?5 ?0 ?5 ?0 ?5 ? ?0 ?5 ?0 ?5 ?0 lo input power vs p rfout , lol, imr, im 3i/q (at vcc = 3.0 v, t a = +85 ?c) lol - local ieak, imr - image rejection, im 3i/q - dbc l o - local input power - dbm p rfout - rf output power - dbm imr lol ?0 ?5 ?0 ?5 ?0 ?5 ? ?0 ?5 ?0 ?5 ?0 lo input power vs p rfout , lol, imr, im 3i/q (at vcc = 3.6 v, t a = +85 ?c) lol - local ieak, imr - image rejection, im 3i/q - dbc l o - local input power - dbm p rfout - rf output power - dbm imr lol ?5 ? ?0 ?5 ? ?0 ?5 ?0 ?5 ?0 ?5 ?0 ?5 ? ?0 ? ?0 ?5 ?0 ?5 ?0 lo input power vs p rfout , lol, imr, im 3i/q (at vcc = 2.7 v, t a = +25 ?c) lol - local ieak, imr - image rejection, im 3i/q - dbc l o - local input power - dbm p rfout - rf output power - dbm imr lol ?0 ?5 ?0 ?5 ?0 ?5 ? ?0 ?5 ?0 ?5 ?0 lo input power vs p rfout , lol, imr, im 3i/q (at vcc = 3.0 v, t a = +25 ?c) lol - local ieak, imr - image rejection, im 3i/q - dbc l o - local input power - dbm p rfout - rf output power - dbm imr lol ?0 ?5 ?0 ?5 ?0 ?5 ?0 ? ?0 ?5 ?0 ?5 ?0 lo input power vs p rfout , lol, imr, im 3i/q (at vcc = 3.6 v, t a = +25 ?c) lol - local ieak, imr - image rejection, im 3i/q - dbc l o - local input power - dbm p rfout - rf output power - dbm imr lol ?5 ? ?0 ?5 ? ?5 p rfout im 3i/q im 3i/q im 3i/q p rfout im 3i/q im 3i/q im 3i/q p rfout p rfout p rfout p rfout
data sheet p11074ej3v0ds00 13 m m m m pc8110gr i/q biase voltage vs p rfout , lol, imr, im 3i/q (at v cc = 2.7 v, t a = ?0 ?c) lol - local ieak, imr - image rejection, im 3i/q - dbc p rfout - rf output power - dbm ?0 ?5 ?0 ?5 ?0 ?5 ? ?0 ?5 ?0 ?5 ?0 1.25 1.35 1.45 i/q (dc) - i/q supply voltage - v p rfout im 3i/q i/q biase voltage vs p rfout , lol, imr, im 3i/q (at v cc = 3.0 v, t a = ?0 ?c) ?0 ?5 ?0 ?5 ?0 ?5 ? ?0 ?5 ?0 ?5 ?0 1.4 1.5 1.6 i/q (dc) - i/q supply voltage - v im 3i/q p rfout lol imr i/q biase voltage vs p rfout , lol, imr, im 3i/q (at v cc = 3.6 v, t a = ?0 ?c) ?0 ?5 ?0 ?5 ?0 ?5 ? ?0 ?5 ?0 ?5 ?0 1.7 1.8 1.9 i/q (dc) - i/q supply voltage - v p rfout lol imr im 3i/q i/q biase voltage vs p rfout , lol, imr, im 3i/q (at v cc = 2.7 v, t a = +25 ?c) lol - local ieak, imr - image rejection, im 3i/q - dbc p rfout - rf output power - dbm ?0 ?5 ?0 ?5 ?0 ?5 ? ?0 ?5 ?0 ?5 ?0 1.25 1.35 1.45 i/q (dc) - i/q supply voltage - v i/q biase voltage vs p rfout , lol, imr, im 3i/q (at v cc = 3.0 v, t a = +25 ?c) ?0 ?5 ?0 ?5 ?0 ?5 ? ?0 ?5 ?0 ?5 ?0 1.4 1.5 1.6 i/q (dc) - i/q supply voltage - v i/q biase voltage vs p rfout , lol, imr, im 3i/q (at v cc = 3.6 v, t a = +25 ?c) ?0 ?5 ?0 ?5 ?0 ?5 ? ?0 ?5 ?0 ?5 ?0 1.7 1.8 1.9 i/q (dc) - i/q supply voltage - v lol imr im 3i/q imr lol p rfout p rfout lol imr im 3i/q im 3i/q imr lol p rfout lol - local ieak, imr - image rejection, im 3i/q - dbc p rfout - rf output power - dbm lol - local ieak, imr - image rejection, im 3i/q - dbc p rfout - rf output power - dbm lol - local ieak, imr - image rejection, im 3i/q - dbc p rfout - rf output power - dbm lol - local ieak, imr - image rejection, im 3i/q - dbc p rfout - rf output power - dbm
data sheet p11074ej3v0ds00 14 m m m m pc8110gr i/q biase voltage vs p rfout , lol, imr, im 3i/q (at v cc = 2.7 v, t a = +85 ?c) ?0 ?5 ?0 ?5 ?0 ?5 ? ?0 ?5 ?0 ?5 ?0 1.25 1.35 1.45 i/q (dc) - i/q supply voltage - v ?0 ?5 ?0 ?5 ?0 ?5 ? ?0 ?5 ?0 ?5 ?0 1.4 1.5 1.6 i/q (dc) - i/q supply voltage - v i/q biase voltage vs p rfout , lol, imr, im 3i/q (at v cc = 3.6 v, t a = +85 ?c) ?0 ?5 ?0 ?5 ?0 ?5 ? ?0 ?5 ?0 ?5 ?0 1.7 1.8 1.9 i/q (dc) - i/q supply voltage - v i/q biase voltage vs p rfout , lol, imr, im 3i/q (at v cc = 3.0 v, t a = +85 ?c) im 3i/q imr lol p rfout im 3i/q imr lol p rfout im 3i/q imr lol p rfout lol - local ieak, imr - image rejection, im 3i/q - dbc p rfout - rf output power - dbm lol - local ieak, imr - image rejection, im 3i/q - dbc p rfout - rf output power - dbm lol - local ieak, imr - image rejection, im 3i/q - dbc p rfout - rf output power - dbm
data sheet p11074ej3v0ds00 15 m m m m pc8110gr typical sine wave modulation output spectrum 42 kbps, rnyq a = 0.5, mod pattern [0000] att 10 db a_write b_blank ref 0.0 dbm 10 db/ rbw 300 hz vbw 300 hz swp 1.2 s center 948.00000 mhz span 50.0 khz 3 im 3i/q * 2 imr 1 lol p out d marker ?0.50 khz ?7.36 db 1 2 3 4 typical p /4dqpsk modulation output spectrum 42 kbps, rnyq a = 0.5, mod pattern [pn9] d mkr ?0.50 khz ref level 0 dbm 10 db/ adj bs 21 khz rbw 3 khz vbw 3 khz swp 5 s center 948 mhz span 500 khz padj (db) no.1 : 947.90 mhz no.2 : 947.95 mhz no.3 : 948.05 mhz no.4 : 948.10 mhz ?8.0 db ?7.0 db ?0.3 db ?7.8 db d f = ?00 khz d f = ?0 khz d f = +50 khz d f = +100 khz marker
data sheet p11074ej3v0ds00 16 m m m m pc8110gr ref 0.0 dbm 10 db/ d mkr 2.714 s rbw 3 mhz vbw 3 mhz swp 50 s center 948.002642 mhz span 0 hz att 10 db a_view b_blank power save response (at v cc = v ps = 2.7 v) ref 0.0 dbm 10 db/ d mkr 2.714 s rbw 3 mhz vbw 3 mhz swp 50 s center 948.002642 mhz span 0 hz att 10 db a_view b_blank power save response (at v cc = v ps = 3.0 v) ref 0.0 dbm 10 db/ d mkr 2.714 s rbw 3 mhz vbw 3 mhz swp 50 s center 948.002642 mhz span 0 hz att 10 db a_view b_blank power save response (at v cc = v ps = 3.6 v) d marker 2.714 s 44.41 db m d marker 2.714 s 45.97 db d marker 2.714 s 48.97 db m mm m m m m m
data sheet p11074ej3v0ds00 17 m m m m pc8110gr l o input (l oin ) impedance 1 marker 1 948 mhz 1 : 30.055 w 7.1015 w 1.1922 nh 948.000 000 mhz start 700.000 000 mhz stop 1 100.000 000 mhz 1 marker 1 948 mhz 1 : 30.191 w 7.1309 w 1.1872 nh 948.000 000 mhz start 700.000 000 mhz stop 1 100.000 000 mhz v cc = v ps = 2.7 v v cc = v ps = 3.0 v 1 marker 1 948 mhz 1 : 30.189 w 7.001 w 1.1754 nh 948.000 000 mhz start 700.000 000 mhz stop 1 100.000 000 mhz v cc = v ps = 3.6 v
data sheet p11074ej3v0ds00 18 m m m m pc8110gr rf output (rf out ) impedance marker 1 948 mhz 1 : 45.74 w ?.8633 w 56.634 pf 948.000 000 mhz start 700.000 000 mhz stop 1 100.000 000 mhz marker 1 948 mhz 1 : 45.005 w ?.6352 w 59.199 pf 948.000 000 mhz start 700.000 000 mhz stop 1 100.000 000 mhz v cc = v ps = 2.7 v v cc = v ps = 3.0 v marker 1 948 mhz 1 : 45.925 w ?.6719 w 62.834 pf 948.000 000 mhz start 700.000 000 mhz stop 1 100.000 000 mhz v cc = v ps = 3.6 v 1 1 1
data sheet p11074ej3v0ds00 19 m m m m pc8110gr test circuit l oin 33 pf 33 pf 51 w q in q in i in i in 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 v ps v cc 1 v cc 2 0.22 f 0.22 f m m 100 pf 1000 pf rf out 33 pf 100 pf 1000 pf
data sheet p11074ej3v0ds00 20 m m m m pc8110gr measurement block diagram 1 (rf output power, local carrier leak, image rejection, i/q 3rd order intermodulation distortion and power save rise and fall time) q in q in i in i in qb q i/q signal generator 33 pf 33 pf l oin 51 w v ps v cc 1 v cc 2 0.22 f m m 0.22 f 100 pf 1000 pf rf out 33 pf 100 pf 1000 pf voltage source voltage source pulse pattern generator signal generator 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 spectrum analyzer ib i
data sheet p11074ej3v0ds00 21 m m m m pc8110gr measurement block diagram 2 (local input vswr and rf output vswr) q in q in i in i in 33 pf 33 pf l oin 51 w v ps v cc 1 v cc 2 0.22 f m m 0.22 f 100 pf 1000 pf rf out 33 pf 100 pf 1000 pf voltage source voltage source 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 network analyzer voltage source network analyzer
data sheet p11074ej3v0ds00 22 m m m m pc8110gr test board 33 pf 33 pf 51 w bypass capacitor v cc 2 rf out pc8110gr m bypass capacitor v ps short v cc 1 l oin q in i in 33 pf q in i in notes 1. double-sided patterning with 35 m m thick copper on polyhimid board sizing 50 50 0.4 mm. 2. gnd pattern on backside. 3. solder coating over patterns. 4. { , indicate through-holes.
data sheet p11074ej3v0ds00 23 m m m m pc8110gr package dimensions 20 pin plastic ssop (225 mil) (unit: mm) 20 detail of lead end 1.8 max. 3? +7? C3? 0.65 0.10 m 0.15 0.5 0.2 11 110 6.7 0.3 1.5 0.1 0.1 0.1 0.22 +0.10 C0.05 0.575 max. 0.15 +0.10 C0.05 6.4 0.2 4.4 0.1 1.0 0.2 note each lead centerline is located within 0.10 mm of its true position (t.p.) at maximum material condition.
data sheet p11074ej3v0ds00 24 m m m m pc8110gr note on correct use (1) observe precautions for handling because of electrostatic sensitive devices. (2) form a ground pattern as wide as possible to keep the minimum ground impedance (to prevent undesired oscillation). (3) keep the track length of the ground pins as short as possible. (4) connect a bypass capacitor (e.x. 1 000 pf) to the v cc pin. (5) i, q dc offset voltage should be same as the i, q dc offset voltage (to prevent changing the local leak level with power save control.) recommended soldering conditions this product should be soldered in the following recommended conditions. other soldering method and conditions than the recommended conditions are to be consulted with our sales representatives. m m m m pc8110gr soldering process soldering conditions symbol infrared ray reflow peak packages surface temperature: 235 c or below, reflow time: 30 seconds or below (210 c or higher), number of reflow process: 3, exposure limit note : none ir35-00-3 vps peak packages surface temperature: 215 c or below, reflow time: 40 seconds or below (200 c or higher), number of reflow process: 3, exposure limit note : none vp15-00-3 wave soldering solder temperature: 260 c or below, flow time: 10 seconds or below, number of flow process: 1, exposure limit note : none ws60-00-1 partial heating method terminal temperature: 300 c or below, flow time: 3 seconds/pin or below, exposure limit note : none note exposure limit before soldering after dry-pack package is opened. storage conditions: 25 c and relative humidity at 65 % or less. caution apply only a single process at once, except for partial heating method. for details of recommended soldering conditions for surface mounting, refer to information document semiconductor device mounting technology manual (c10535e).
data sheet p11074ej3v0ds00 25 m m m m pc8110gr [memo]
data sheet p11074ej3v0ds00 26 m m m m pc8110gr [memo]
data sheet p11074ej3v0ds00 27 m m m m pc8110gr [memo]
m m m m pc8110gr the information in this document is subject to change without notice. before using this document, please confirm that this is the latest version. ? no part of this document may be copied or reproduced in any form or by any means without the prior written consent of nec corporation. nec corporation assumes no responsibility for any errors which may appear in this document. ? nec corporation does not assume any liability for infringement of patents, copyrights or other intellectual property rights of third parties by or arising from use of a device described herein or any other liability arising from use of such device. no license, either express, implied or otherwise, is granted under any patents, copyrights or other intellectual property rights of nec corporation or others. ? descriptions of circuits, software, and other related information in this document are provided for illustrative purposes in semiconductor product operation and application examples. the incorporation of these circuits, software, and information in the design of the customer's equipment shall be done under the full responsibility of the customer. nec corporation assumes no responsibility for any losses incurred by the customer or third parties arising from the use of these circuits, software, and information. ? while nec corporation has been making continuous effort to enhance the reliability of its semiconductor devices, the possibility of defects cannot be eliminated entirely. to minimize risks of damage or injury to persons or property arising from a defect in an nec semiconductor device, customers must incorporate sufficient safety measures in its design, such as redundancy, fire-containment, and anti-failure features. ? nec devices are classified into the following three quality grades: "standard", "special", and "specific". the specific quality grade applies only to devices developed based on a customer designated "quality assurance program" for a specific application. the recommended applications of a device depend on its quality grade, as indicated below. customers must check the quality grade of each device before using it in a particular application. standard: computers, office equipment, communications equipment, test and measurement equipment, audio and visual equipment, home electronic appliances, machine tools, personal electronic equipment and industrial robots special: transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster systems, anti-crime systems, safety equipment and medical equipment (not specifically designed for life support) specific: aircraft, aerospace equipment, submersible repeaters, nuclear reactor control systems, life support systems or medical equipment for life support, etc. the quality grade of nec devices is "standard" unless otherwise specified in nec's data sheets or data books. if customers intend to use nec devices for applications other than those specified for standard quality grade, they should contact an nec sales representative in advance. m7 98. 8

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